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JTAG-Booster for Analog Devices ADSP-21xxx
MS2#
MS3#
SW#
Out,Hi
Out,Hi
Out,Hi
// Memory Select Line
// Memory Select Line
// Synchronous Write Select
// Group D:
//
//
//
//
SDCLK0
RAS#
CAS#
SDWE#
DQM
SDCKE
SDA10
All pins in this group must be set to the same direction
DQM and SDA10 are tristateable outputs but can't be read back.
All others are bidirectional pins.
This group is switched to output/active during programming of
Flash-EPROMs.
Out,Lo // SDRAM clock output
Out,Hi // SDRAM row address strobe
Out,Hi // SDRAM column address strobe
Out,Hi // SDRAM write enable
Out,Lo // SDRAM data mask
Out,Hi // SDRAM clock enable
Out,Lo // SDRAM A10 pin
// The following pins are complete bidirectional pins.
// The direction of each pin can be set independent of the other pins.
// Each pin can be used as input.
BR1# Inp // Multiprocessing Bus Request
BR2# Inp // Multiprocessing Bus Request
ACK Inp // Memory Acknowledge
HBG# Inp // Host Bus Grant
RFS0 Inp // Receive Frame Sync
RCLK0 Inp // Receive Clock
TFS0 Inp // Transmit Frame Sync
TCLK0 Inp // Transmit Clock
RFS1 Inp // Receive Frame Sync
RCLK1 Inp // Receive Clock
TFS1 Inp // Transmit Frame Sync
TCLK1 Inp // Transmit Clock
BMS# Out,Hi // Boot Memory Select = CS# of Flash-EPROM
FLAG0 Inp // Flag Pin
FLAG1 Inp // Flag Pin
FLAG2 Inp // Flag Pin
FLAG3 Inp // Flag Pin
FLAG4 Inp // Flag Pin
FLAG5 Inp // Flag Pin
FLAG6 Inp // Flag Pin
FLAG7 Inp // Flag Pin
FLAG8 Inp // Flag Pin
FLAG9 Inp // Flag Pin
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JTAG_ADSP-21xxxa.doc
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